FPL25 Reading List
Highlighting Significant Contributions from 25 Years of the International Conference on Field Programmable Logic and Applications (1991–2014)
The first International Conference on Field-Programmable Logic and Applications (FPL) was held in 1991 at Oxford University. In the ensuing years, it has become the largest meeting on field-programmable gate array (FPGA) technologies and systems, and many important contributions have been published at the conference. Below are listed the most significant contributions from 1991 to 2014. The selection was made by an international Significant Papers Committee (SPC), as described in this article, where the endorsements are detailed.
1993
Dynamic Reconfigurationreconfiguration of FPGAs
Patrick Lysaght and John Dunlop
Dynamic Reconfiguration
1995
An Assessmentassessment of the Suitabilitysuitability of FPGA-based Systemssystems for use in Digitaldigital Signalsignal Processingprocessing
Russell PetersenJ. Petersen, Brad L. Hutchings
Applications and Brad HutchingsBenchmarks
1996
RaPiD - reconfigurable pipelined datapath
C. Ebeling, D.C. Cronquist and P. Franklin
Architecture
RaPiD – Reconfigurable Pipelined Datapath
C. Ebeling, D.C. Cronquist andCronquist, P. Franklin
Dynamic Reconfiguration
1997
VPR: A Newnew Packing,packing, Placementplacement and Routingrouting Tooltool for FPGA Researchresearch
Vaughn Betz and Jonathan Rose.Rose
FPLDesign 1997.Methods Endorsementand Tools
1999
SONIC –- a Plug-plug-in Architecturearchitecture for Videovideo Processingprocessing
Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk andLuk, John Stone
Applications and Benchmarks
2000
Multitasking on FPGA Coprocessors
Harald Simmler, L. Levinson and Reinhard Männer
Applications and Benchmarks
Stream Computations Organized for Reconfigurable Execution (SCORE)
Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek and André DeHon
Architecture
MultitaskingStReAm: onObject-Oriented FPGAProgramming Coprocessorsof Stream Architectures Using PAM-Blox
HaraldOskar Simmler,Mencer, L.Heiko LevinsonHübert, Martin Morf and Reinhard Männer
StReAm: Object-oriented programming of stream architectures using PAM-Blox
O. Mencer, H. Hu ̈bert, M. Morf, and M.Michael J. Flynn
Design Methods and Tools
2002
A Flexible Power Model for FPGAs
Kara K. W. Poon, Andy Yan, Steven J. E. Wilton
Architecture
Granidt: Towards Gigabit-rateGigabit Rate Network Intrusion Detection Technology
Maya Gokhale, Dave Dubois, Andy Dubois, Mike Boorman, Steve Poole andPoole, Vic Hogsett
A Flexible Power Model for FPGAs
Kara Poon, Andy YanSecurity and Steven WiltonNetwork-on-Chip
2003
Fast,A Large-scaleSmith-Waterman StringSystolic Match for a 10Gbps FPGA-based Network Intrusion Detection SystemCell
IoannisChi SourdisWai Yu, K. H. Kwong, Kin-Hong Lee, Philip H. W. Leong
Applications and Dionisios PnevmatikatosBenchmarks
Networks-on-chipADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins
Architecture
Virtualizing Hardware with Multi-context Reconfigurable Arrays
Rolf Enzler, Christian Plessl, Marco Platzner
Dynamic Reconfiguration
Networks on Chip as Hardware Components of an OS for Reconfigurable Systems
Théodore Marescaux, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde andVernalde, Rudy Lauwereins
Security and Network-on-Chip
VirtualizingFast, HardwareLarge-Scale withString Multi-contextMatch Reconfigurablefor Arraysa 10Gbps FPGA-Based Network Intrusion Detection System
RolfIoannis Enzler,Sourdis, ChristianDionisios PlesslN. Pnevmatikatos
Security and Marco Platzner
ADRES: An Architecture with Tightly-coupled VLIW Processor and Coarse-grained Reconfigurable Matrix
Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo de Man and Rudy Lauwereins
A Smith-Waterman Systolic Cell
Chi Yu, K. Kwong, Kin-Hong Lee and Philip LeongNetwork-on-Chip
2004
A Dual-VDD Low Power FPGA Architecture
Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
Architecture
The Impact of Pipelining on Energy per Operation in Field-programmableProgrammable Gate Arrays
Steven J. E. Wilton, Su-Shin Ang and Wayne Luk
A Dual-Vdd Low-power FPGA Architecture
AmanDesign Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut Kandemir, Mary-Jane IrwinMethods and Tim TuanTools
2005
Context-savingContext Saving and -restoringRestoring for Multitasking in Reconfigurable Systems
Heiko Kalte and Mario Porrmann
Dynamic Reconfiguration
2006
Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs
Patrick Lysaght, Brandon Blodget, Jeff Mason, Jay Young and Brendan Bridgford
Design Methods and Tools
2007
Physical Unclonable Functions, FPGAs and Public-keyKey Crypto for IP Protection
Jorge Guajardo, Sandeep S. Kumar, Geert SchrijenJan Schrijena and Pim Tuyls
Applications and Benchmarks
2008
ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAs
Dirk Koch, Christian Beckhoff and Jürgen Teich
Dynamic Reconfiguration
2009
Performance comparison of FPGA, GPU and CPU in image processing
Shuichi Asano, Tsutomu Maruyama and Yoshiki Yamaguchi
Applications and Benchmarks
FPGA partial reconfiguration via configuration scrubbing
Jonathan Heiner, Benjamin Sellers, Michael J. Wirthlin and Jeff Kalb
Dynamic Reconfiguration
2010
FPGA Implementations of the Round Two SHA-3 Candidates
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilton, Neil Hanley, Mire O'Neill, William P. Marnane
Applications and Benchmarks
2013
Accelerating Solvers for Global Atmospheric Equations Through Mixed-Precision Data Flow Engine
Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Xiaomeng Huang, Youhui Zhang, Guangwen Yang
Applications and Benchmarks
The Power of Communication: Energy-Efficient NoCs for FPGAs
Mohamed Abdelfattah and Vaughn Betz
Security and Network-on-Chip