Hall of Fame

The TCFPGA Hall of Fame collects influential papers, published at related venues, that have been recognised for their impact over a number of years.

Class of 2025 Nominations

NOMINATIONS OPEN! You can submit your nominations for the Class of 2025 here.

Selection Committee

The Selection Committee for the Hall of Fame Class of 2025 are:

Hall of Fame Inductees

Below are papers that have been inducted into the TCFPGA Hall of Fame. Nominations are secured each year, followed by detailed consideration by a panel of experts. The papers inducted to date appear below:

Class of 2025

Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks
Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2015, pp. 161–170.
Inducted at the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 28th February 2025
(endorsement)

Class of 2024

Designing custom arithmetic data paths with FloPoCo
Florent De Dinechin, Bogdan Pasca
IEEE Design and Test, Vol. 28, No. 4, pp. 18–27, 2011
Inducted at the International Conference on Field Programmable Logic and Applications, 5th September 2024

Class of 2023

Application-Specific Instruction Generation for Configurable Processor Architectures
Jason Cong, Y. Fan, G. Han, Zhiru Zhang
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2004, pp. 183-189.
(endorsement)

JBits: Java based interface for reconfigurable computing
Steve Guccione, Delon Levi and Prasanna Sundararajan
Proceedings of the 2nd Annual Military and Aerospace Applications of Programmable Devices and Technologies Conference, 1999.
(endorsement)

Class of 2022

Improving FPGA Performance and Area Using an Adaptive Logic Module
Mike Hutton, Jay Schleicher, David Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault , Andy Lee, Henry Kim and Rahul Saini 14th Field Programmable Logic, 2004, pp. 135-144
(endorsement)

FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, Wen-Mei W. Hwu
IEEE Symposium on Application Specific Processors, 2009, pp. 35-42
(endorsement)

An efficient and versatile scheduling algorithm based on SDC formulation
Jason Cong and Zhiru Zhang
Design Automation Conference, 2006, pp. 433-438
(endorsement)

Class of 2021

Performance-Constrained Pipelining of Software Loops onto Reconfigurable Hardware
Greg Snider
International Symposium on FPGAs, Feb. 2002, Pages 177–186
inducted at the International Symposium on Field-Programmable Gate Arrays on March 2, 2021
(endorsement)

Directional and Single-Driver Wires in FPGA Interconnect
Guy Lemieux, Edmund Lee, Marvin Tom, and Anthony Yu
2004 IEEE International Conference on Field-Programmable Technology, December 2004, Pages 41-48
Inducted at the International Conference on Field-Programmable Technology on December 9, 2021
(endorsement)

Class of 2020

ReconOS: Multithreaded Programming for Reconfigurable Computers
Enno Lübbers and Marco Platzner
IEEE Transactions on Embedded Computing Systems (TECS), Volume: 9, Issue: 1, October 2009

High-Quality, Deterministic Parallel Placement for FPGAs on Commodity Hardware
Adrian Ludwin, Vaughn Betz and Ketan Padalia
Proceedings of the 16th International ACM/SIGDA Symposium on Field Programmable Gate Arrays, pp 14–23, February 2008
(endorsement)

Class of 2019

The Density Advantage of Configurable Computing
André DeHon
IEEE Computer, Volume: 33 , Issue: 4, pp. 41–49, April 2000
(endorsement)

A High-performance Microarchitecture with Hardware-programmable Functional Units
Rahul Razdan and Michael. D. Smith
roceedings of the 27th Annual International Symposium on Microarchitecture, pp. 172–180, Nov/Dec 1994
(endorsement)

Processor reconfiguration through instruction-set metamorphosis
Peter M. Athanas and Harvey F. Silverman
IEEE Computer, Volume 26, Issue 3, pp 11–18, March 1993
(endorsement)

Class of 2018

A User Programmable Reconfigurable Logic Array
William S. Carter, Khue Duong, Ross H. Freeman, Hung-Cheng Hsieh, Jason Y. Ja, John E. Mahoney, Luan T. Ngo, Shelly L. Sze
Proceedings of the IEEE Custom Integrated Circuits Conference, pp. 233–235, 1986
(endorsement)

An Efficient Logic Emulation System
Joseph Varghese, Michael Butts, and Jon Batcheller
IEEE Transactions on VLSI Systems, vol. 1, no. 2, pp. 171–174, June 1993
(endorsement)

Building and Using a Highly Parallel Programmable Logic Array
Maya Gokhale, William Holmes, Andrew Kopser, Sara Lucas, Ronald Minnich, Douglas Sweely and Daniel Lopresti
IEEE Computer, vol. 24, no. 1, pp. 81–89, Jan. 1991
(endorsement)

Class of 2017

FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs
Jason Cong and Yuzheng Ding
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, no. 1, pp. 1-12, Jan 1994
(endorsement)

Programmable Active Memories: Reconfigurable Systems Come of Age
Jean E. Vuillemin, Patrice Bertin, Didier Roncin, Mark Shand, Hervé Touati, and Philippe Boucard
IEEE Transactions on Very Large Scale Integration Systems, vol. 4, no. 1, pp. 56–69, March 1996
(endorsement)

A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology
James R. Heath, Philip J. Kuekes, Gregory S. Snider, and R. Stanley Williams
Science, 12 Jun 1998, vol. 280, no. 5370, pp. 1716-1721
(endorsement)

FPGA 20, FCCM 20, and FPL25 Class

All papers from the FPGA 20, FCCM 20, and FPL 25 lists are also inductees in the Hall of Fame

Hall of Fame Regulations

Initializing Hall-of-Fame

For each paper selected for FPGA20, FCCM20, and FPL25 that meets the 10 year requirement (published 2007 or earlier), the Hall-of-Fame will either include that paper or the subsequent journal paper. The first-year selection committee will sort out which papers should be recognized as the journal article rather than the conference paper. If the paper is 10 years old, but the journal is younger, we will take the date of the conference paper for establishing the 10 year minimum requirement.

Selection Committee

Composed of 20 individuals who already have papers recognized in the Hall-of-Fame. For the sake of the first-year, papers meeting the 10 year requirement are effectively considered Hall-of-Fame papers. Committee members serve 4-year committee terms, with the terms staggered so that 5 new members rotate on and 5 old members rotate off each year. After serving a 4-year term, an individual is not eligible to rejoin the committee for 4 years.

The chair for a year selects the incoming committee members for that year from among those eligible. The chair is encouraged to consult with the existing committee to identify the potential new members to invite.

Committee members should be selected to keep the committee balanced across regions (e.g., North America, Europe, Asia) and specialization areas (e.g., architecture, tools, applications, cir- cuits and technology).

Non-Conflict

Papers from members of the selection committee are not eligible for consider- ation. Since this is an ongoing effort and members rotate off after 4 years, the only impact is that a paper’s induction may be delayed by (up to) 4 years. For the first year, we should pay attention to this in selecting the initial selection committee and perhaps the shortened terms for a few members of the initial selection committee. Not being invited for the initial selection committee may be a sign of respect that ones papers should be strong contenders for early induction into the Hall-of-Fame.

Chair

The chair is elected to a one-year term by the selection committee, at the end of the year, from among the members that have served for two years. This guarantees that the incoming chair has seen how the committee and previous chairs operate. It also has the effect of limiting the maximum term of a chair to two years.

Chair selection is done at the end of a selection-committee year for the next year. All committee members, including outgoing committee members vote for the new chair. The new chair selects the incoming members for the next year. To start the process, the chair for the first year will be selected by TCFPGA. The committee for the first year will be proposed to and approved by TCFPGA.

Publicity

Award Honorees get a certificate, recognition on a hall-of-fame web page, and associated brag- ging rights. There is no current plan for any monetary award. A member of the selection committee will present the award at the author’s selected venue.

Press Release Plan to make a press release of selection at the beginning of each calendar year.

Recognition and Conferences The selected venue conference will honor the awardees. We will need to get cooperation from the appropriate general-chairs to schedule in the award. One observation is that the conference could use the induction of an honored paper as part of their publicity. A conference may even choose to include a short acceptance speech (or, potentially, even a keynote talk) by the authors as part of their program.

There is no intent to prevent honoring awardees at non F-conferences, but we may not have the connections to guarantee an arbitrary conference will cooperate.

Notes on Intentions

Venues The intent here is to cover “all” reasonable conference and journal venues, and we use the “peer-reviewed” requirement to capture that. In addition to the F-conferences and associated journals, this allows us to include papers in other key venues, such as DAC, ICCAD, CICC, ISCA, SuperComputing, JSSC, TRCAD, TRVLSI, TODAES, and JETC.

Nomination Date The August 31st deadline is designed to not interfere directly with the ISFPGA conference paper deadline, but allow the committee time to make decisions by the end of the calendar year. This also provides an opportunity for the selection committee to meet as a sidebar to the ISFPGA program committee conference if they deem it appropriate. Selection by the end of the year allows inductees to be honored at any of the conferences during the year, including ISFPGA which is typically the earliest. For the first year, we will keep nominations open until one week after FPL to allow a final advertisement and nominations form the FPL community. Nomination Process Take nominations on public website like FPGA20, FCCM20 (with suitable updating of technology).

Number to Induct per Year (N) The goal is for the Hall-of-Fame to include roughly the best 1% of papers published in the area of FPGAs and Reconfigurable Computing. If we knew the number of papers being published, an exclusiveness rate would determine the steady-state number we should be inducting. The number of relevant papers is probably fuzzy—while we can get a clear number from the F-conferences and F-journals, the number in other venues will vary and be somewhat subjective. Furthermore, this likely changes over time—ideally it grows as more people see the value of this field. Looking at the current F-conferences, we’re probably looking at around 125/year from FPGA (25), FCCM (25), FPT (25), FPL (50). Even these vary depending on mix of short papers. Other conferences (e.g., ARC, RAW, ReConFig, …) will add more. TRETS adds another 25, IJRC 20. Then there are papers in DAC, ISCA, ISCAS, ANCS, …. and TCAD, TVLSI, TNS, TODAES, … So, we’re probably looking at 250–300 papers a year. If we called it 300 and targeted 1%, we would have 3 per year. However, we are starting with a backlog of almost 30 years of papers not in the F-conferences (and hence potentially included in FPGA20, FCCM20, FPL20), so we will need to induct more than 3/year to handle the backlog. Since the volume of papers changes over time, we should expect this number to need periodic revision. The hall-of-fame committee should monitor and propose adjustments to TCFPGA.

Votes and Counts The idea is that any paper should receive a plurality of support to be in the Hall-of-Fame, so we set the threshold, C, at half the committee size, P (C=P/2). We set V, the votes per committee member, to half the maximum number of inductees, N, so that we guarantee we won’t have more than N things above C (PV votes cast, if everything gets minimal P/2, we have PV/(P/2)=2V things getting over C votes). This formula probably also guarantees we seldom get all N.

If there are too many nominees in a year to reasonably handle the selection with a single round of balloting, the chair may institute further process steps to determine the contents of the final ballot. This may include prior rounds of balloting to eliminate nominations that are not strong contenders.

We expect this formula and methodology will need fine tuning. We encourage the committee and chair to monitor the process and fine tune. For large revisions, make a proposal back to the TCFPGA for approval.

Hall of Fame Selection Committee

Final selection from the nominations are made by our Hall-of-Fame Selection committee.

Selection committee members serve 4 year, staggered terms. Below are the committees that served for each previous class of the Hall of Fame.

Class of 2024

The selection Committee for Hall of Fame Class of 2024 were::

Class of 2023

The selection Committee for Hall of Fame Class of 2023 were::

Class of 2022

The Selection Committee for Hall of Fame Class of 2022 were:

Class of 2021

The Selection Committee for Hall of Fame Class of 2021 were:

Class of 2020

The Selection Committee for Hall of Fame Class of 2020 were:

Class of 2019

The Selection Committee for Hall of Fame Class of 2019 were:

Class of 2018

The selection Committee for Hall of Fame Class of 2018 were:

Class of 2017

The Selection Committee for Hall of Fame Class of 2017 were:

HoF Nomination Template

Paper Title: [Insert title here]

Paper Authors: [Insert authors here]

Venue: [Insert conference or journal name here]

Year: [Insert year of publication here]

DOI: [Paste paper DOI here if available]

Citations: [Insert number of citations according to Google Scholar here]

Justification: [Please insert a detailed justification of your nomination here]