# FPGA Best Paper Awards

The ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA) has awarded Best Paper Awards to the following papers:

#### 2026
**[KANELÉ: Kolmogorov-Arnold Networks for Efficient LUT-based Evaluation](https://dl.acm.org/doi/10.1145/3748173.3779202)**  
Duc Hoang, Aarush Gupta and Philip C Harris

#### 2025
**[FlightVGM: Efficient Video Generation Model Inference with Online Sparsification and Hybrid Precision on FPGAs](https://dl.acm.org/doi/abs/10.1145/3706628.3708864)**  
Jun Liu, Shulin Zeng, Li Ding, Widyadewi Soedarmadji, Hao Zhou, Zehao Wang, Jinhao Li, Jintao Li, Yadong Dai, Kairui Wen, Shan He, Yaqi Sun, Yu Wang and Guohao Dai 

#### 2024
**[Formal Verification of Source-to-Source Transformations for HLS](https://dl.acm.org/doi/10.1145/3626202.3637563)**  
Louis-Noël Pouchet, Emily Tucker, Niansong Zhang, Hongzheng Chen, Debjit Pal, Gabriel Rodríguez and Zhiru Zhang

#### 2023
**[DONGLE: Direct FPGA-Orchestrated NVMe Storage for HLS](https://dl.acm.org/doi/10.1145/3543622.3573185)**  
Linus Y. Wong, Jialiang Zhang and Jing (Jane) Li

#### 2022
**[RapidStream: Parallel Physical Implementation of FPGA HLS Designs](https://dl.acm.org/doi/abs/10.1145/3490422.3502361)**  
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang and Jason Cong

#### 2021
**[AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs](https://dl.acm.org/doi/10.1145/3431920.3439289)**  
Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang and Jason Cong

#### 2020
**[Buffer Placement and Sizing for High-Performance Dataflow Circuits](https://dl.acm.org/doi/abs/10.1145/3373087.3375314)**  
Lana Josipović, Shabnam Sheikhha, Andrea Guerrieri, Paolo Ienne and Jordi Cortadella

#### 2019
**[HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing](https://dl.acm.org/doi/abs/10.1145/3289602.3293910)**  
Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong and Zhiru Zhang

#### 2018
**[FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering](https://dl.acm.org/doi/10.1145/3174243.3174252)**  
Shijie Zhou, Rajgopal Kannan, Yu Min and Viktor K. Prasanna

#### 2017
**[ESE: Efficient Speech Recognition Engine with Compressed LSTM on FPGA](https://dl.acm.org/citation.cfm?id=3021745)**  
Song Han, Junlong Kang, Huizi Mao, Yiming Hu, Xin Li, Yubin Li, Dongliang Xie, Hong Luo, Song Yao, Yu Wang, Huazhong Yang, William (Bill) J. Dally

#### 2016
**[FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures](https://dl.acm.org/doi/10.1145/2847263.2847280)**  
Grace Zgheib, Manana Lortkipanidze, Muhsen Owaida, David Novo and Paolo Ienne

#### 2015
**[Take the Highway: Design for Embedded NoCs on FPGAs](https://dl.acm.org/doi/10.1145/2684746.2689074)**  
Mohamed S. Abdelfattah, Andrew Bitar and Vaughn Betz

#### 2014
**[Optimizing Effective Interconnect Capacitance for FPGA Power Reduction](https://dl.acm.org/doi/10.1145/2554688.2554788)**  
Safeen Huda, Jason Anderson and Hirotaka Tamura

#### 2013
**[Polyhedral-Based Data Reuse Optimization for Configurable Computing](https://dl.acm.org/doi/10.1145/2435264.2435273)**  
Louis-Noel Pouchet, Peng Zhang, P. Sadayappan and Jason Cong

#### 2012
**[Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones](https://dl.acm.org/doi/10.1145/2145694.2145715)**  
Hadi Parandeh-Afshar, Hind Benbihi, David Novo and Paolo Ienne

#### 2011
**[CoRAM: an in-fabric memory architecture for FPGA-based computing](https://dl.acm.org/doi/10.1145/1950413.1950435)**  
Eric S. Chung, James C. Hoe, and Ken Mai