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ACM SIGDA Technical Committee on FPGAs and Reconfigurable Computing

A dynamically-reconfigurable, power-efficient turbo decoder (2004)
posted by Andre on Sunday April 01, @02:20PM
from the reconfiguring-to-save-energy dept.
FCCM 20 Nomination wayne writes "One of the earliest demonstration of how run-time reconfiguration can reduce power consumption for an important application in communication."

Title:A dynamically-reconfigurable, power-efficient turbo decoder
Category:Run-Time Systems and Run-Time Reconfiguration
DOI Link:

Significance Criteria
[Key Building Block: 4] [Opened Area: 4] [Industry Impact: 3] [Model Paper: 3] [Highly Cited: 2]
(all rated 1 (low=bottom half of all papers in FPGA conference) to 5 (high=in top 5 papers by this criteria);
if you would rate differently, leave a comment with your suggested changes and rationale.)

Rate the article in this nomination
Rate: A dynamically-reconfigurable, power-efficient turbo decoder (2004)
5: should be considered a candidate for top overall paper
4: definitely should be in most significant (definitely in top 10 paper)
3: worthy nomination for consideration (definitely in top 50 papers)
2: good paper (top 50%), but there are plenty of better papers
1: should not be considered (bottom 50%)
No Opinion
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Comments:0 | Votes:0

An FPGA Implementation of Explicit-State Model Checking (2008) | The Transmogrifier C hardware description language and compiler for FPGAs (1995)  >


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